Towards micro electrical impedance tomography on chip

This work presents initial design and testing of a miniaturized electrical impedance tomography platform. Electrical impedance tomography (EIT) provides a low-cost, non-invasive, radiation-free type of imaging and can be relatively easily implemented on other miniaturized systems like microfluidics. Herein, we describe a miniaturized EIT on chip, along with its measurement setup and image reconstruction pipeline. First imaging results demonstrating a well-functioning setup are presented and form the basis for further investigations.